From 200d15479c0bc48471ee7b8e538ce33af990f82e Mon Sep 17 00:00:00 2001 From: Stefan Kristiansson Date: Thu, 17 Jul 2014 22:09:10 +0300 Subject: add or1k (OpenRISC 1000) architecture port With the exception of a fenv implementation, the port is fully featured. The port has been tested in or1ksim, the golden reference functional simulator for OpenRISC 1000. It passes all libc-test tests (except the math tests that requires a fenv implementation). The port assumes an or1k implementation that has support for atomic instructions (l.lwa/l.swa). Although it passes all the libc-test tests, the port is still in an experimental state, and has yet experienced very little 'real-world' use. --- src/signal/or1k/sigsetjmp.s | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 src/signal/or1k/sigsetjmp.s (limited to 'src/signal') diff --git a/src/signal/or1k/sigsetjmp.s b/src/signal/or1k/sigsetjmp.s new file mode 100644 index 00000000..70a29223 --- /dev/null +++ b/src/signal/or1k/sigsetjmp.s @@ -0,0 +1,22 @@ +.global sigsetjmp +.global __sigsetjmp +.type sigsetjmp,@function +.type __sigsetjmp,@function +sigsetjmp: +__sigsetjmp: + l.sfeq r4, r0 + l.bf plt(setjmp) + l.sw 52(r3), r4 /* buf->__fl = save */ + + l.addi r1, r1, -8 + l.sw 0(r1), r9 + l.sw 4(r1), r3 + l.addi r5, r3, 56 /* buf->__ss */ + l.add r4, r0, r0 + l.jal plt(sigprocmask) + l.ori r3, r0, 2 /* SIG_SETMASK */ + + l.lwz r9, 0(r1) + l.lwz r3, 4(r1) + l.j plt(setjmp) + l.addi r1, r1, 8 -- cgit v1.2.3-70-g09d2