summaryrefslogtreecommitdiff
path: root/system/gcc
diff options
context:
space:
mode:
authorA. Wilcox <AWilcox@Wilcox-Tech.com>2024-08-07 09:57:01 -0500
committerA. Wilcox <AWilcox@Wilcox-Tech.com>2024-08-07 10:08:26 -0500
commitb28ee76ad22a3e11b854ab615af0fe3d30f4b5e5 (patch)
tree5f7c9e49774333e9ca25c105c84e6669edad8d26 /system/gcc
parentbae0638aa756a582ae5e30c74475b46f7ec793cd (diff)
downloadpackages-b28ee76ad22a3e11b854ab615af0fe3d30f4b5e5.tar.gz
packages-b28ee76ad22a3e11b854ab615af0fe3d30f4b5e5.tar.bz2
packages-b28ee76ad22a3e11b854ab615af0fe3d30f4b5e5.tar.xz
packages-b28ee76ad22a3e11b854ab615af0fe3d30f4b5e5.zip
system/gcc: Fix TSan on PPC64
Diffstat (limited to 'system/gcc')
-rw-r--r--system/gcc/APKBUILD2
-rw-r--r--system/gcc/risc-san.patch59
2 files changed, 61 insertions, 0 deletions
diff --git a/system/gcc/APKBUILD b/system/gcc/APKBUILD
index afcde96ea..ecdfeb48a 100644
--- a/system/gcc/APKBUILD
+++ b/system/gcc/APKBUILD
@@ -186,6 +186,7 @@ source="https://ftp.gnu.org/gnu/gcc/gcc-$pkgver/gcc-$pkgver.tar.xz
gcc-5.4.0-locale.patch
sanitation.patch
+ risc-san.patch
match-split.patch
insn-split.patch
@@ -608,5 +609,6 @@ fa59b0fb081d97f8f63506b8793699588a95c602b5d468140eb1e80456597e52e1cc45dc0b234ac8
1860593584f629d24d5b6db14b0a3412e9f93449b663aaa4981301a0923db0159314905e694f27366fbfef72dce06636ab6df86862b7e9e9564847e03bee82c1 add-classic_table-support.patch
a09b3181002798d1b17b8374eba6bec18e67d4d4f30677311c330b599e231e97cf02c1b9b79c0829952f5027016e01146743b665b19558ed2693c60a567823fb gcc-5.4.0-locale.patch
7fa3f66a9147e13091da7fdf15197aca85e0500756392e1c75eb2e2f77dce6d148277aea2a8cb463770f7b46424a94cb5f60514529a565b4ebb23236dcc7c366 sanitation.patch
+f167da2df3c386dd2f4d39e1fef0964d0fbf7ba35b9432675ada61a7fe3213d4825b579ebb577f46b28c5556b2ada78ed6b7b8b6471b9d9a0684514a73650595 risc-san.patch
ff6159633f04d26eadc79895dc24ccb46671a04fdc728cbbac86964a14ce17e2e51cd7668947dfe06b9168bb9b8575a80955012e5f51295ea02f4f3169e07541 match-split.patch
ee626cbe4bdda5b868980c86ca066d33167d06517db676e43d0719c4ad7d11e99b3a0151927f15c93ab89f6c76dd12bd48d402d25771fa3fd175273248824eda insn-split.patch"
diff --git a/system/gcc/risc-san.patch b/system/gcc/risc-san.patch
new file mode 100644
index 000000000..db4b14697
--- /dev/null
+++ b/system/gcc/risc-san.patch
@@ -0,0 +1,59 @@
+Ensure TSan works on PowerPC and RISC-V.
+
+Ported to GCC from compiler-rt. Original patch at: https://github.com/chimera-linux/cports/blob/0f5c5be86e/main/llvm/patches/0008-compiler-rt-lsan-basic-musl-fixes-on-various-archs.patch
+
+--- gcc-13.3.0/libsanitizer/sanitizer_common/sanitizer_linux_libcdep.cpp.old 2024-05-21 02:47:42.000000000 -0500
++++ gcc-13.3.0/libsanitizer/sanitizer_common/sanitizer_linux_libcdep.cpp 2024-08-05 07:52:22.981401062 -0500
+@@ -29,6 +29,14 @@
+ #include "sanitizer_procmaps.h"
+ #include "sanitizer_solaris.h"
+
++#if defined(__powerpc__)
++#define DTP_OFFSET 0x8000
++#elif SANITIZER_RISCV64
++#define DTP_OFFSET 0x800
++#else
++#define DTP_OFFSET 0
++#endif
++
+ #if SANITIZER_NETBSD
+ #define _RTLD_SOURCE // for __lwp_gettcb_fast() / __lwp_getprivate_fast()
+ #endif
+@@ -289,6 +297,7 @@
+ return val;
+ }
+
++#if SANITIZER_GLIBC
+ uptr ThreadDescriptorSize() {
+ uptr val = atomic_load_relaxed(&thread_descriptor_size);
+ if (val)
+@@ -303,6 +312,9 @@
+ atomic_store_relaxed(&thread_descriptor_size, val);
+ return val;
+ }
++#else
++uptr ThreadDescriptorSize() { return 0; }
++#endif
+
+ #if defined(__mips__) || defined(__powerpc64__) || SANITIZER_RISCV64
+ // TlsPreTcbSize includes size of struct pthread_descr and size of tcb
+@@ -392,6 +404,7 @@
+ begin = (uptr)__tls_get_addr(mod_and_off);
+ #endif
+ }
++ begin -= DTP_OFFSET;
+ for (unsigned i = 0; i != info->dlpi_phnum; ++i)
+ if (info->dlpi_phdr[i].p_type == PT_TLS) {
+ static_cast<InternalMmapVector<TlsBlock> *>(data)->push_back(
+@@ -542,9 +555,11 @@
+ else if (SANITIZER_FREEBSD)
+ *size += 128; // RTLD_STATIC_TLS_EXTRA
+ #if defined(__mips__) || defined(__powerpc64__) || SANITIZER_RISCV64
++# if SANITIZER_GLIBC
+ const uptr pre_tcb_size = TlsPreTcbSize();
+ *addr -= pre_tcb_size;
+ *size += pre_tcb_size;
++# endif
+ #else
+ // arm and aarch64 reserve two words at TP, so this underestimates the range.
+ // However, this is sufficient for the purpose of finding the pointers to