From 76033d6ea82669a441290a19804b54e3892388a7 Mon Sep 17 00:00:00 2001
From: "A. Wilcox" <AWilcox@Wilcox-Tech.com>
Date: Tue, 3 Jul 2018 04:54:31 -0500
Subject: user/qemu: new package

---
 ...linux-user-fix-build-with-musl-on-ppc64le.patch | 67 ++++++++++++++++++++++
 1 file changed, 67 insertions(+)
 create mode 100644 user/qemu/0001-linux-user-fix-build-with-musl-on-ppc64le.patch

(limited to 'user/qemu/0001-linux-user-fix-build-with-musl-on-ppc64le.patch')

diff --git a/user/qemu/0001-linux-user-fix-build-with-musl-on-ppc64le.patch b/user/qemu/0001-linux-user-fix-build-with-musl-on-ppc64le.patch
new file mode 100644
index 000000000..c3a918775
--- /dev/null
+++ b/user/qemu/0001-linux-user-fix-build-with-musl-on-ppc64le.patch
@@ -0,0 +1,67 @@
+--- a/linux-user/host/ppc64/hostdep.h
++++ b/linux-user/host/ppc64/hostdep.h
+@@ -25,7 +25,11 @@
+ static inline void rewind_if_in_safe_syscall(void *puc)
+ {
+     ucontext_t *uc = puc;
++#if defined(__GLIBC__) || defined(__UCLIBC__)
+     unsigned long *pcreg = &uc->uc_mcontext.gp_regs[PT_NIP];
++#else // Musl
++    unsigned long *pcreg = &uc->uc_mcontext.gp_regs[32];
++#endif
+ 
+     if (*pcreg > (uintptr_t)safe_syscall_start
+         && *pcreg < (uintptr_t)safe_syscall_end) {
+--- a/accel/tcg/user-exec.c
++++ a/accel/tcg/user-exec.c
+@@ -228,6 +228,7 @@
+  */
+ #ifdef linux
+ /* All Registers access - only for local access */
++#if defined(__GLIBC__) || defined(__UCLIBC__)
+ #define REG_sig(reg_name, context)              \
+     ((context)->uc_mcontext.regs->reg_name)
+ /* Gpr Registers access  */
+@@ -245,15 +246,42 @@
+ /* Condition register */
+ #define CR_sig(context)                        REG_sig(ccr, context)
+
++#else // Musl
++#define REG_sig(reg_num, context)              \
++    ((context)->uc_mcontext.gp_regs[reg_num])
++/* Gpr Registers access  */
++#define GPR_sig(reg_num, context)              REG_sig(gpr[reg_num], context)
++/* Program counter */
++#define IAR_sig(context)                       REG_sig(32, context)
++/* Machine State Register (Supervisor) */
++#define MSR_sig(context)                       REG_sig(33, context)
++/* Count register */
++#define CTR_sig(context)                       REG_sig(35, context)
++/* User's integer exception register */
++#define XER_sig(context)                       REG_sig(37, context)
++/* Link register */
++#define LR_sig(context)                        REG_sig(36, context)
++/* Condition register */
++#define CR_sig(context)                        REG_sig(38, context)
++#endif
++
++
+ /* Float Registers access  */
+ #define FLOAT_sig(reg_num, context)                                     \
+     (((double *)((char *)((context)->uc_mcontext.regs + 48 * 4)))[reg_num])
+ #define FPSCR_sig(context) \
+     (*(int *)((char *)((context)->uc_mcontext.regs + (48 + 32 * 2) * 4)))
+ /* Exception Registers access */
++#if defined(__GLIBC__) || defined(__UCLIBC__)
+ #define DAR_sig(context)                       REG_sig(dar, context)
+ #define DSISR_sig(context)                     REG_sig(dsisr, context)
+ #define TRAP_sig(context)                      REG_sig(trap, context)
++#else // Musl
++#define DAR_sig(context)                       REG_sig(41, context)
++#define DSISR_sig(context)                     REG_sig(42, context)
++#define TRAP_sig(context)                      REG_sig(40, context)
++#endif
++
+ #endif /* linux */
+
+ #if defined(__FreeBSD__) || defined(__FreeBSD_kernel__)
-- 
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