From b69f6a06f8698c72c30465dbfa1cc91334551b03 Mon Sep 17 00:00:00 2001
From: "A. Wilcox" <AWilcox@Wilcox-Tech.com>
Date: Thu, 27 Feb 2020 04:40:40 -0600
Subject: user/mesa: Fix behaviour on big endian systems

---
 user/mesa/APKBUILD                  |  2 ++
 user/mesa/big-endian-flipping.patch | 37 +++++++++++++++++++++++++++++++++++++
 2 files changed, 39 insertions(+)
 create mode 100644 user/mesa/big-endian-flipping.patch

(limited to 'user')

diff --git a/user/mesa/APKBUILD b/user/mesa/APKBUILD
index 8ae8cca81..7af2e17cd 100644
--- a/user/mesa/APKBUILD
+++ b/user/mesa/APKBUILD
@@ -21,6 +21,7 @@ subpackages="$pkgname-dev $pkgname-dri
 #	requires glslang: $pkgname-vulkan-overlay
 source="https://mesa.freedesktop.org/archive/mesa-$pkgver.tar.xz
 	amdgpu-pthread-header.patch
+	big-endian-flipping.patch
 	intel-vulkan.patch
 	musl-fixes.patch
 	musl-fix-includes.patch
@@ -154,6 +155,7 @@ dri() {
 
 sha512sums="2bbb3dc8f1d839f11fe12cc959393cd69607fa6714b2166b80299e0559d2d3b0ac38ed4e15ac3e5f472264eb24536d1901d350f7409f3a7e00d6f4ccbb2312fb  mesa-19.3.4.tar.xz
 245d0d64d858dfadeeb544f31f7d0bb6ecb746a7fd5ec99755d679ae1a1eef4198d66473fb24d333eb6786bb8657012771e8285d67f165dc61a031df801947aa  amdgpu-pthread-header.patch
+3417e5c6d7ec564178e1d72431042b0a6ba659321f13a3dda81eda5fa0f2c8bc7c6972cb8266aea84ab05976ffb161659e9988c50ecc418e8bc1e1ce8f93a65f  big-endian-flipping.patch
 ba954ea9aa49e5cdfec08f310f41abf09e01a2a889a09b6c32a154b750d3ebb2bfb5a9b7d244c06d26442688aeeb7f212f5f3c98c6db69f878098a49d476ff70  intel-vulkan.patch
 9f7a050f09571a2b17098d495b82e2e85b293fb7285e7d6d7c3c48cd4220a1bdcc61a7321ba78dd14860939ecabe7e89b32d6110f3728f793273e1e26b78a553  musl-fixes.patch
 c7d91a660a033df91fac9c557039efc8669f0c26b2d35997d50753938b70d1af0bd110dcab3f8236eafab7d4be5dd7cd128a3e057e67e7e6a38a73fd6a7ef62e  musl-fix-includes.patch
diff --git a/user/mesa/big-endian-flipping.patch b/user/mesa/big-endian-flipping.patch
new file mode 100644
index 000000000..154a83108
--- /dev/null
+++ b/user/mesa/big-endian-flipping.patch
@@ -0,0 +1,37 @@
+From f1e0d76264491a8d8f99a0041b1a36cf9752fd28 Mon Sep 17 00:00:00 2001
+From: "A. Wilcox" <AWilcox@Wilcox-Tech.com>
+Date: Thu, 27 Feb 2020 04:24:52 -0600
+Subject: [PATCH] mesa: Support flipping three-channel formats
+
+Test system: POWER9 ppc64 (BE) system with a Radeon R5 230.
+
+Before this commit, starting Xorg caused this message:
+Assertion failed: !"Invalid array format" (../src/mesa/main/formats.c: _mesa_array_format_flip_channels: 421)
+
+After this commit, Xorg starts successfully.
+---
+ src/mesa/main/formats.c | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+diff --git a/src/mesa/main/formats.c b/src/mesa/main/formats.c
+index 370859d37ca..2e7d5d7f05e 100644
+--- a/src/mesa/main/formats.c
++++ b/src/mesa/main/formats.c
+@@ -419,6 +419,14 @@ _mesa_array_format_flip_channels(mesa_array_format format)
+       return format;
+    }
+ 
++   if (num_channels == 3) {
++      static const uint8_t flip[6] = { 2, 1, 0, 3, 4, 5 };
++      _mesa_array_format_set_swizzle(&format,
++                                     flip[swizzle[0]], flip[swizzle[1]],
++                                     flip[swizzle[2]], flip[swizzle[3]]);
++      return format;
++   }
++
+    if (num_channels == 4) {
+       static const uint8_t flip[6] = { 3, 2, 1, 0, 4, 5 };
+       _mesa_array_format_set_swizzle(&format,
+-- 
+2.25.1
+
-- 
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