From 09133288128a4968bf211b603883dae7a23fac6a Mon Sep 17 00:00:00 2001 From: Chris Green Date: Thu, 24 Oct 2019 12:44:58 -0500 Subject: Correctly identify Skylake CPUs on Darwin. (#13377) * Correctly identify Skylake CPUs on Darwin. * Add a test for haswell on Mojave. --- lib/spack/llnl/util/cpu/detect.py | 4 ++++ lib/spack/spack/test/data/targets/darwin-mojave-broadwell | 5 ----- lib/spack/spack/test/data/targets/darwin-mojave-haswell | 5 +++++ lib/spack/spack/test/data/targets/darwin-mojave-skylake | 5 +++++ lib/spack/spack/test/llnl/util/cpu.py | 4 +++- 5 files changed, 17 insertions(+), 6 deletions(-) delete mode 100644 lib/spack/spack/test/data/targets/darwin-mojave-broadwell create mode 100644 lib/spack/spack/test/data/targets/darwin-mojave-haswell create mode 100644 lib/spack/spack/test/data/targets/darwin-mojave-skylake diff --git a/lib/spack/llnl/util/cpu/detect.py b/lib/spack/llnl/util/cpu/detect.py index 92b75e9653..c89f67c852 100644 --- a/lib/spack/llnl/util/cpu/detect.py +++ b/lib/spack/llnl/util/cpu/detect.py @@ -117,6 +117,10 @@ def sysctl_info_dict(): info['flags'] += ' sse4_2' if 'avx1.0' in info['flags']: info['flags'] += ' avx' + if 'clfsopt' in info['flags']: + info['flags'] += ' clflushopt' + if 'xsave' in info['flags']: + info['flags'] += ' xsavec xsaveopt' return info diff --git a/lib/spack/spack/test/data/targets/darwin-mojave-broadwell b/lib/spack/spack/test/data/targets/darwin-mojave-broadwell deleted file mode 100644 index 67dc28a966..0000000000 --- a/lib/spack/spack/test/data/targets/darwin-mojave-broadwell +++ /dev/null @@ -1,5 +0,0 @@ -machdep.cpu.vendor: GenuineIntel -machdep.cpu.features: FPU VME DE PSE TSC MSR PAE MCE CX8 APIC SEP MTRR PGE MCA CMOV PAT PSE36 CLFSH DS ACPI MMX FXSR SSE SSE2 SS HTT TM PBE SSE3 PCLMULQDQ DTES64 MON DSCPL VMX EST TM2 SSSE3 FMA CX16 TPR PDCM SSE4.1 SSE4.2 x2APIC MOVBE POPCNT AES PCID XSAVE OSXSAVE SEGLIM64 TSCTMR AVX1.0 RDRAND F16C -machdep.cpu.leaf7_features: RDWRFSGS TSC_THREAD_OFFSET SGX BMI1 HLE AVX2 SMEP BMI2 ERMS INVPCID RTM FPU_CSDS MPX RDSEED ADX SMAP CLFSOPT IPT MDCLEAR TSXFA IBRS STIBP L1DF SSBD -machdep.cpu.model: 94 -machdep.cpu.brand_string: Intel(R) Core(TM) i7-6700K CPU @ 4.00GHz diff --git a/lib/spack/spack/test/data/targets/darwin-mojave-haswell b/lib/spack/spack/test/data/targets/darwin-mojave-haswell new file mode 100644 index 0000000000..45054c5676 --- /dev/null +++ b/lib/spack/spack/test/data/targets/darwin-mojave-haswell @@ -0,0 +1,5 @@ +machdep.cpu.vendor: GenuineIntel +machdep.cpu.model: 70 +machdep.cpu.brand_string: Intel(R) Core(TM) i7-4980HQ CPU @ 2.80GHz +machdep.cpu.features: FPU VME DE PSE TSC MSR PAE MCE CX8 APIC SEP MTRR PGE MCA CMOV PAT PSE36 CLFSH DS ACPI MMX FXSR SSE SSE2 SS HTT TM PBE SSE3 PCLMULQDQ DTES64 MON DSCPL VMX SMX EST TM2 SSSE3 FMA CX16 TPR PDCM SSE4.1 SSE4.2 x2APIC MOVBE POPCNT AES PCID XSAVE OSXSAVE SEGLIM64 TSCTMR AVX1.0 RDRAND F16C +machdep.cpu.leaf7_features: RDWRFSGS TSC_THREAD_OFFSET BMI1 AVX2 SMEP BMI2 ERMS INVPCID FPU_CSDS MDCLEAR IBRS STIBP L1DF SSBD diff --git a/lib/spack/spack/test/data/targets/darwin-mojave-skylake b/lib/spack/spack/test/data/targets/darwin-mojave-skylake new file mode 100644 index 0000000000..67dc28a966 --- /dev/null +++ b/lib/spack/spack/test/data/targets/darwin-mojave-skylake @@ -0,0 +1,5 @@ +machdep.cpu.vendor: GenuineIntel +machdep.cpu.features: FPU VME DE PSE TSC MSR PAE MCE CX8 APIC SEP MTRR PGE MCA CMOV PAT PSE36 CLFSH DS ACPI MMX FXSR SSE SSE2 SS HTT TM PBE SSE3 PCLMULQDQ DTES64 MON DSCPL VMX EST TM2 SSSE3 FMA CX16 TPR PDCM SSE4.1 SSE4.2 x2APIC MOVBE POPCNT AES PCID XSAVE OSXSAVE SEGLIM64 TSCTMR AVX1.0 RDRAND F16C +machdep.cpu.leaf7_features: RDWRFSGS TSC_THREAD_OFFSET SGX BMI1 HLE AVX2 SMEP BMI2 ERMS INVPCID RTM FPU_CSDS MPX RDSEED ADX SMAP CLFSOPT IPT MDCLEAR TSXFA IBRS STIBP L1DF SSBD +machdep.cpu.model: 94 +machdep.cpu.brand_string: Intel(R) Core(TM) i7-6700K CPU @ 4.00GHz diff --git a/lib/spack/spack/test/llnl/util/cpu.py b/lib/spack/spack/test/llnl/util/cpu.py index 2e03772d19..7e32dda71a 100644 --- a/lib/spack/spack/test/llnl/util/cpu.py +++ b/lib/spack/spack/test/llnl/util/cpu.py @@ -29,7 +29,8 @@ from llnl.util.cpu import Microarchitecture # noqa 'linux-rhel6-piledriver', 'linux-centos7-power8le', 'darwin-mojave-ivybridge', - 'darwin-mojave-broadwell', + 'darwin-mojave-haswell', + 'darwin-mojave-skylake', 'bgq-rhel6-power7' ]) def expected_target(request, monkeypatch): @@ -156,6 +157,7 @@ def test_architecture_family(target_name, expected_family): ('skylake', 'sse3'), ('power8', 'altivec'), ('broadwell', 'sse4.1'), + ('skylake', 'clflushopt'), ('aarch64', 'neon') ]) def test_features_query(target_name, feature): -- cgit v1.2.3-70-g09d2