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author | Szabolcs Nagy <nsz@port70.net> | 2019-09-25 19:34:25 +0100 |
---|---|---|
committer | Rich Felker <dalias@aerifal.cx> | 2019-09-26 00:34:15 -0400 |
commit | b678f7b46a614ca8985b3ef662d96036e06e8810 (patch) | |
tree | dc35054552afd0fbccc7f78258cef15080a78994 | |
parent | 29bad49d72e5aeedb97d2bb2af44838d934026a0 (diff) | |
download | musl-b678f7b46a614ca8985b3ef662d96036e06e8810.tar.gz musl-b678f7b46a614ca8985b3ef662d96036e06e8810.tar.bz2 musl-b678f7b46a614ca8985b3ef662d96036e06e8810.tar.xz musl-b678f7b46a614ca8985b3ef662d96036e06e8810.zip |
arm: fix setjmp and longjmp asm for armv8-a
armv8 removed the coprocessor instructions other than cp14, so
on an armv8 system the related hwcaps should never be set.
new llvm complains about the use of coprocessor instructions in
armv8-a mode (even though they are never executed at runtime),
so ifdef them out when musl is built for armv8.
-rw-r--r-- | src/setjmp/arm/longjmp.S (renamed from src/setjmp/arm/longjmp.s) | 7 | ||||
-rw-r--r-- | src/setjmp/arm/setjmp.S (renamed from src/setjmp/arm/setjmp.s) | 7 |
2 files changed, 14 insertions, 0 deletions
diff --git a/src/setjmp/arm/longjmp.s b/src/setjmp/arm/longjmp.S index 76cc2920..8df0b819 100644 --- a/src/setjmp/arm/longjmp.s +++ b/src/setjmp/arm/longjmp.S @@ -16,11 +16,14 @@ longjmp: ldr r2,1f ldr r1,[r1,r2] +#if __ARM_ARCH < 8 tst r1,#0x260 beq 3f + // HWCAP_ARM_FPA tst r1,#0x20 beq 2f ldc p2, cr4, [ip], #48 +#endif 2: tst r1,#0x40 beq 2f .fpu vfp @@ -28,6 +31,8 @@ longjmp: .fpu softvfp .eabi_attribute 10, 0 .eabi_attribute 27, 0 +#if __ARM_ARCH < 8 + // HWCAP_ARM_IWMMXT 2: tst r1,#0x200 beq 3f ldcl p1, cr10, [ip], #8 @@ -36,6 +41,8 @@ longjmp: ldcl p1, cr13, [ip], #8 ldcl p1, cr14, [ip], #8 ldcl p1, cr15, [ip], #8 +#endif +2: 3: bx lr .hidden __hwcap diff --git a/src/setjmp/arm/setjmp.s b/src/setjmp/arm/setjmp.S index 011315b7..45731d22 100644 --- a/src/setjmp/arm/setjmp.s +++ b/src/setjmp/arm/setjmp.S @@ -18,11 +18,14 @@ setjmp: ldr r2,1f ldr r1,[r1,r2] +#if __ARM_ARCH < 8 tst r1,#0x260 beq 3f + // HWCAP_ARM_FPA tst r1,#0x20 beq 2f stc p2, cr4, [ip], #48 +#endif 2: tst r1,#0x40 beq 2f .fpu vfp @@ -30,6 +33,8 @@ setjmp: .fpu softvfp .eabi_attribute 10, 0 .eabi_attribute 27, 0 +#if __ARM_ARCH < 8 + // HWCAP_ARM_IWMMXT 2: tst r1,#0x200 beq 3f stcl p1, cr10, [ip], #8 @@ -38,6 +43,8 @@ setjmp: stcl p1, cr13, [ip], #8 stcl p1, cr14, [ip], #8 stcl p1, cr15, [ip], #8 +#endif +2: 3: bx lr .hidden __hwcap |