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authorRich Felker <dalias@aerifal.cx>2012-10-18 22:13:36 -0400
committerRich Felker <dalias@aerifal.cx>2012-10-18 22:13:36 -0400
commit25011215be8fa7ebddaaf71ac30dbac851b761ca (patch)
tree63be1f00e0e19e51086723d91aa0591805c04830 /arch/microblaze/syscall_arch.h
parent1f485230df7a1c634fcec29d870d2566aee2031c (diff)
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inline syscalls for microblaze
Diffstat (limited to 'arch/microblaze/syscall_arch.h')
-rw-r--r--arch/microblaze/syscall_arch.h97
1 files changed, 97 insertions, 0 deletions
diff --git a/arch/microblaze/syscall_arch.h b/arch/microblaze/syscall_arch.h
index 48b0e36b..5d66cb11 100644
--- a/arch/microblaze/syscall_arch.h
+++ b/arch/microblaze/syscall_arch.h
@@ -5,6 +5,101 @@
#define __SYSCALL_SSLEN 8
+#ifndef __clang__
+
+static __inline long __syscall0(long n)
+{
+ register unsigned long r12 __asm__("r12") = n;
+ register unsigned long r3 __asm__("r3");
+ __asm__ __volatile__ ("brki r14, 0x8" : "=r"(r3)
+ : "r"(r12)
+ : "memory");
+ return r3;
+}
+
+static inline long __syscall1(long n, long a)
+{
+ register unsigned long r12 __asm__("r12") = n;
+ register unsigned long r3 __asm__("r3");
+ register unsigned long r5 __asm__("r5") = a;
+ __asm__ __volatile__ ("brki r14, 0x8" : "=r"(r3)
+ : "r"(r12), "r"(r5)
+ : "memory");
+ return r3;
+}
+
+static inline long __syscall2(long n, long a, long b)
+{
+ register unsigned long r12 __asm__("r12") = n;
+ register unsigned long r3 __asm__("r3");
+ register unsigned long r5 __asm__("r5") = a;
+ register unsigned long r6 __asm__("r6") = b;
+ __asm__ __volatile__ ("brki r14, 0x8" : "=r"(r3)
+ : "r"(r12), "r"(r5), "r"(r6)
+ : "memory");
+ return r3;
+}
+
+static inline long __syscall3(long n, long a, long b, long c)
+{
+ register unsigned long r12 __asm__("r12") = n;
+ register unsigned long r3 __asm__("r3");
+ register unsigned long r5 __asm__("r5") = a;
+ register unsigned long r6 __asm__("r6") = b;
+ register unsigned long r7 __asm__("r7") = c;
+ __asm__ __volatile__ ("brki r14, 0x8" : "=r"(r3)
+ : "r"(r12), "r"(r5), "r"(r6), "r"(r7)
+ : "memory");
+ return r3;
+}
+
+static inline long __syscall4(long n, long a, long b, long c, long d)
+{
+ register unsigned long r12 __asm__("r12") = n;
+ register unsigned long r3 __asm__("r3");
+ register unsigned long r5 __asm__("r5") = a;
+ register unsigned long r6 __asm__("r6") = b;
+ register unsigned long r7 __asm__("r7") = c;
+ register unsigned long r8 __asm__("r8") = d;
+ __asm__ __volatile__ ("brki r14, 0x8" : "=r"(r3)
+ : "r"(r12), "r"(r5), "r"(r6), "r"(r7), "r"(r8)
+ : "memory");
+ return r3;
+}
+
+static inline long __syscall5(long n, long a, long b, long c, long d, long e)
+{
+ register unsigned long r12 __asm__("r12") = n;
+ register unsigned long r3 __asm__("r3");
+ register unsigned long r5 __asm__("r5") = a;
+ register unsigned long r6 __asm__("r6") = b;
+ register unsigned long r7 __asm__("r7") = c;
+ register unsigned long r8 __asm__("r8") = d;
+ register unsigned long r9 __asm__("r9") = e;
+ __asm__ __volatile__ ("brki r14, 0x8" : "=r"(r3)
+ : "r"(r12), "r"(r5), "r"(r6), "r"(r7), "r"(r8), "r"(r9)
+ : "memory");
+ return r3;
+}
+
+static inline long __syscall6(long n, long a, long b, long c, long d, long e, long f)
+{
+ register unsigned long r12 __asm__("r12") = n;
+ register unsigned long r3 __asm__("r3");
+ register unsigned long r5 __asm__("r5") = a;
+ register unsigned long r6 __asm__("r6") = b;
+ register unsigned long r7 __asm__("r7") = c;
+ register unsigned long r8 __asm__("r8") = d;
+ register unsigned long r9 __asm__("r9") = e;
+ register unsigned long r10 __asm__("r10") = f;
+ __asm__ __volatile__ ("brki r14, 0x8" : "=r"(r3)
+ : "r"(r12), "r"(r5), "r"(r6), "r"(r7), "r"(r8), "r"(r9), "r"(r10)
+ : "memory");
+ return r3;
+}
+
+#else
+
static inline long __syscall0(long n)
{
return (__syscall)(n);
@@ -39,3 +134,5 @@ static inline long __syscall6(long n, long a, long b, long c, long d, long e, lo
{
return (__syscall)(n, a, b, c, d, e, f);
}
+
+#endif