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author | A. Wilcox <AWilcox@Wilcox-Tech.com> | 2018-09-25 20:28:24 +0000 |
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committer | A. Wilcox <AWilcox@Wilcox-Tech.com> | 2018-09-25 20:28:24 +0000 |
commit | bcbf02c88923b122ed03cb9ab6b727838c60d2f7 (patch) | |
tree | 90b1300e953f5e4212fce63ccccd35f8fc25cc53 /system/musl | |
parent | 0e0678178f66c09afba1170ae74495c20fc01e4f (diff) | |
download | packages-bcbf02c88923b122ed03cb9ab6b727838c60d2f7.tar.gz packages-bcbf02c88923b122ed03cb9ab6b727838c60d2f7.tar.bz2 packages-bcbf02c88923b122ed03cb9ab6b727838c60d2f7.tar.xz packages-bcbf02c88923b122ed03cb9ab6b727838c60d2f7.zip |
system/musl: fix PPC64 atomics
Diffstat (limited to 'system/musl')
-rw-r--r-- | system/musl/APKBUILD | 4 | ||||
-rw-r--r-- | system/musl/ppc64-atomic.patch | 74 |
2 files changed, 77 insertions, 1 deletions
diff --git a/system/musl/APKBUILD b/system/musl/APKBUILD index 867af507c..a3a0eb81c 100644 --- a/system/musl/APKBUILD +++ b/system/musl/APKBUILD @@ -2,7 +2,7 @@ # Maintainer: A. Wilcox <awilfox@adelielinux.org> pkgname=musl pkgver=1.1.20 -pkgrel=2 +pkgrel=3 pkgdesc="System library (libc) implementation" url="http://www.musl-libc.org/" arch="all" @@ -26,6 +26,7 @@ source="http://www.musl-libc.org/releases/musl-$pkgver.tar.gz fix-file-locking-race.patch dcngettext-null-deref.patch getaddrinfo-regression.patch + ppc64-atomic.patch ldconfig getent.c @@ -120,6 +121,7 @@ sha512sums="d3a7a30aa375ca50d7dcfbd618581d59e1aa5378417f50a0ca5510099336fd74cc9d b967339d9048161583523e847be91779adb0e16cc225d6ff85ef51748269b2dab08a0b8e558ad01469135837a9df76a59bf9a31791dd4063d75bc5efe6e94861 fix-file-locking-race.patch a08d1b170356beea333ace1da12f8a8399ca80c5d9c32ff2fcd8562537a670214f566e4b1219a11b32129078e22fbf7009bb277b7de8550a89352a64b3b5090d dcngettext-null-deref.patch e3953a3a73ef11696dd3eb216e18b152ae35198d8bff686d157e27bc90fb558f9a0be518025a90534e9afd6ea1bf731ffdb6fcb202bb9368f2c8eec7ca886141 getaddrinfo-regression.patch +aae9110eccb8cd7dcd3c957fcb01ed524598f79f7fa1a16b9993af40793545d1ec211e7e6aeabe7af7715d94cc26a473ea0acf6d6e66019bf65f03d4b8e24a4b ppc64-atomic.patch cce2f1eeb61e55674469c26871a573cce61d739c3defe9c8f56f2b774f6ba5435849ad542a6714120efddc98c297098e9c98a1a424ac593df2243d4aa479f9a9 ldconfig 378d70e65bcc65bb4e1415354cecfa54b0c1146dfb24474b69e418cdbf7ad730472cd09f6f103e1c99ba6c324c9560bccdf287f5889bbc3ef0bdf0e08da47413 getent.c 9d42d66fb1facce2b85dad919be5be819ee290bd26ca2db00982b2f8e055a0196290a008711cbe2b18ec9eee8d2270e3b3a4692c5a1b807013baa5c2b70a2bbf iconv.c" diff --git a/system/musl/ppc64-atomic.patch b/system/musl/ppc64-atomic.patch new file mode 100644 index 000000000..6e96a9048 --- /dev/null +++ b/system/musl/ppc64-atomic.patch @@ -0,0 +1,74 @@ +From 12817793301398241b6cb00c740f0d3ca41076e9 Mon Sep 17 00:00:00 2001 +From: Rich Felker <dalias@aerifal.cx> +Date: Fri, 14 Sep 2018 10:47:16 -0400 +Subject: fix broken atomic store on powerpc[64] + +in our memory model, all atomics are supposed to be full barriers; +stores are not release-only. this is important because store is used +as an unlock operation in places where it needs to acquire the waiter +count to determine if a futex wake is needed. at least in the +malloc-internal locks, but possibly elsewhere, soft deadlocks from +missing futex wake (breakable by poking the threads to restart the +syscall, e.g. by attaching a tracer) were reported to occur. + +once the malloc lock is replaced with Jens Gustedt's new lock +implementation (see commit 47d0bcd4762f223364e5b58d5a381aaa0cbd7c38), +malloc will not be affected by the issue, but it's not clear that +other uses won't be. reducing the strength of the ordering properties +required from a_store would require a thorough analysis of how it's +used. + +to fix the problem, I'm removing the powerpc[64]-specific a_store +definition; now, the top-level atomic.h will implement a_store using +a_barrier on both sides of the store. + +it's not clear to me yet whether there might be issues with the other +atomics. it's possible that a_post_llsc needs to be replaced with a +full barrier to guarantee the formal semanics we want, but either way +I think the difference is unlikely to impact the way we use them. +--- + arch/powerpc/atomic_arch.h | 8 -------- + arch/powerpc64/atomic_arch.h | 8 -------- + 2 files changed, 16 deletions(-) + +diff --git a/arch/powerpc/atomic_arch.h b/arch/powerpc/atomic_arch.h +index 5b65cde7..c2673919 100644 +--- a/arch/powerpc/atomic_arch.h ++++ b/arch/powerpc/atomic_arch.h +@@ -30,14 +30,6 @@ static inline void a_post_llsc() + __asm__ __volatile__ ("isync" : : : "memory"); + } + +-#define a_store a_store +-static inline void a_store(volatile int *p, int v) +-{ +- a_pre_llsc(); +- *p = v; +- a_post_llsc(); +-} +- + #define a_clz_32 a_clz_32 + static inline int a_clz_32(uint32_t x) + { +diff --git a/arch/powerpc64/atomic_arch.h b/arch/powerpc64/atomic_arch.h +index 17cababd..2bed82be 100644 +--- a/arch/powerpc64/atomic_arch.h ++++ b/arch/powerpc64/atomic_arch.h +@@ -48,14 +48,6 @@ static inline void a_post_llsc() + __asm__ __volatile__ ("isync" : : : "memory"); + } + +-#define a_store a_store +-static inline void a_store(volatile int *p, int v) +-{ +- a_pre_llsc(); +- *p = v; +- a_post_llsc(); +-} +- + #define a_crash a_crash + static inline void a_crash() + { +-- +cgit v1.2.1 + |