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authorA. Wilcox <AWilcox@Wilcox-Tech.com>2019-04-07 02:39:40 +0000
committerA. Wilcox <AWilcox@Wilcox-Tech.com>2019-04-07 02:40:34 +0000
commit94628432b84d6c739deab02e7ed9a532f517a686 (patch)
treeb9727bc5bc06b47c90a27f74a5e46cd61d5a9441 /user/llvm7/more-secure-plt.patch
parenta04f1bdf2bc5420b245130a24b07a5efe4aa2d04 (diff)
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user/llvm7: fix PPC32 Secure PLT code
Diffstat (limited to 'user/llvm7/more-secure-plt.patch')
-rw-r--r--user/llvm7/more-secure-plt.patch13
1 files changed, 13 insertions, 0 deletions
diff --git a/user/llvm7/more-secure-plt.patch b/user/llvm7/more-secure-plt.patch
index 64920c74c..1a32eea4f 100644
--- a/user/llvm7/more-secure-plt.patch
+++ b/user/llvm7/more-secure-plt.patch
@@ -1,3 +1,16 @@
+--- a/lib/Target/PowerPC/PPCSubtarget.cpp
++++ b/lib/Target/PowerPC/PPCSubtarget.cpp
+@@ -138,6 +138,10 @@
+ if (isDarwin())
+ HasLazyResolverStubs = true;
+
++ // Set up musl-specific properties.
++ if (TargetTriple.getEnvironment() == Triple::Musl)
++ SecurePlt = true;
++
+ if (HasSPE && IsPPC64)
+ report_fatal_error( "SPE is only supported for 32-bit targets.\n", false);
+ if (HasSPE && (HasAltivec || HasQPX || HasVSX || HasFPU))
diff --git a/lib/Target/PowerPC/PPCTargetMachine.cpp b/lib/Target/PowerPC/PPCTargetMachine.cpp
index c583fba8cab..6a9eedf89c5 100644
--- a/lib/Target/PowerPC/PPCTargetMachine.cpp