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authorA. Wilcox <AWilcox@Wilcox-Tech.com>2019-03-24 04:23:39 +0000
committerA. Wilcox <AWilcox@Wilcox-Tech.com>2019-03-24 04:23:39 +0000
commitb76feb56976cf8c06b8d6d3b797a8415b5ccb453 (patch)
treed6f69724d050abf075b2236f9578f8728673a255 /user/openjdk8/icedtea-hotspot-musl-ppc.patch
parent47f49a1accf187c4800566c10ce163b98ef5b149 (diff)
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user/openjdk8: new package
Diffstat (limited to 'user/openjdk8/icedtea-hotspot-musl-ppc.patch')
-rw-r--r--user/openjdk8/icedtea-hotspot-musl-ppc.patch169
1 files changed, 169 insertions, 0 deletions
diff --git a/user/openjdk8/icedtea-hotspot-musl-ppc.patch b/user/openjdk8/icedtea-hotspot-musl-ppc.patch
new file mode 100644
index 000000000..eca684884
--- /dev/null
+++ b/user/openjdk8/icedtea-hotspot-musl-ppc.patch
@@ -0,0 +1,169 @@
+--- openjdk.orig/hotspot/src/os_cpu/linux_ppc/vm/os_linux_ppc.cpp
++++ openjdk/hotspot/src/os_cpu/linux_ppc/vm/os_linux_ppc.cpp
+@@ -110,11 +110,19 @@
+ // it because the volatile registers are not needed to make setcontext() work.
+ // Hopefully it was zero'd out beforehand.
+ guarantee(uc->uc_mcontext.regs != NULL, "only use ucontext_get_pc in sigaction context");
++#if defined(__GLIBC__) || defined(__UCLIBC__)
+ return (address)uc->uc_mcontext.regs->nip;
++#else // Musl
++ return (address)uc->uc_mcontext.gp_regs[32];
++#endif
+ }
+
+ intptr_t* os::Linux::ucontext_get_sp(ucontext_t * uc) {
++#if defined(__GLIBC__) || defined(__UCLIBC__)
+ return (intptr_t*)uc->uc_mcontext.regs->gpr[1/*REG_SP*/];
++#else // Musl
++ return (intptr_t*)uc->uc_mcontext.gp_regs[1/*REG_SP*/];
++#endif
+ }
+
+ intptr_t* os::Linux::ucontext_get_fp(ucontext_t * uc) {
+@@ -213,7 +221,11 @@
+ if (uc) {
+ address const pc = os::Linux::ucontext_get_pc(uc);
+ if (pc && StubRoutines::is_safefetch_fault(pc)) {
++#if defined(__GLIBC__) || defined(__UCLIBC__)
+ uc->uc_mcontext.regs->nip = (unsigned long)StubRoutines::continuation_for_safefetch_fault(pc);
++#else // Musl
++ uc->uc_mcontext.gp_regs[32] = (unsigned long)StubRoutines::continuation_for_safefetch_fault(pc);
++#endif
+ return true;
+ }
+ }
+@@ -364,7 +376,11 @@
+ // continue at the next instruction after the faulting read. Returning
+ // garbage from this read is ok.
+ thread->set_pending_unsafe_access_error();
++#if defined(__GLIBC__) || defined(__UCLIBC__)
+ uc->uc_mcontext.regs->nip = ((unsigned long)pc) + 4;
++#else // Musl
++ uc->uc_mcontext.gp_regs[32] = ((unsigned long)pc) + 4;
++#endif
+ return true;
+ }
+ }
+@@ -383,7 +399,11 @@
+ // continue at the next instruction after the faulting read. Returning
+ // garbage from this read is ok.
+ thread->set_pending_unsafe_access_error();
++#if defined(__GLIBC__) || defined(__UCLIBC__)
+ uc->uc_mcontext.regs->nip = ((unsigned long)pc) + 4;
++#else // Musl
++ uc->uc_mcontext.gp_regs[32] = ((unsigned long)pc) + 4;
++#endif
+ return true;
+ }
+ }
+@@ -406,7 +426,11 @@
+ if (stub != NULL) {
+ // Save all thread context in case we need to restore it.
+ if (thread != NULL) thread->set_saved_exception_pc(pc);
++#if defined(__GLIBC__) || defined(__UCLIBC__)
+ uc->uc_mcontext.regs->nip = (unsigned long)stub;
++#else
++ uc->uc_mcontext.gp_regs[32] = (unsigned long)stub;
++#endif
+ return true;
+ }
+
+@@ -564,6 +588,7 @@
+ ucontext_t* uc = (ucontext_t*)context;
+
+ st->print_cr("Registers:");
++#if defined(__GLIBC__) || defined(__UCLIBC__)
+ st->print("pc =" INTPTR_FORMAT " ", uc->uc_mcontext.regs->nip);
+ st->print("lr =" INTPTR_FORMAT " ", uc->uc_mcontext.regs->link);
+ st->print("ctr=" INTPTR_FORMAT " ", uc->uc_mcontext.regs->ctr);
+@@ -572,8 +597,18 @@
+ st->print("r%-2d=" INTPTR_FORMAT " ", i, uc->uc_mcontext.regs->gpr[i]);
+ if (i % 3 == 2) st->cr();
+ }
++#else // Musl
++ st->print("pc =" INTPTR_FORMAT " ", uc->uc_mcontext.gp_regs[32]);
++ st->print("lr =" INTPTR_FORMAT " ", uc->uc_mcontext.gp_regs[36]);
++ st->print("ctr=" INTPTR_FORMAT " ", uc->uc_mcontext.gp_regs[35]);
+ st->cr();
++ for (int i = 0; i < 32; i++) {
++ st->print("r%-2d=" INTPTR_FORMAT " ", i, uc->uc_mcontext.gp_regs[i]);
++ if (i % 3 == 2) st->cr();
++ }
++#endif
+ st->cr();
++ st->cr();
+
+ intptr_t *sp = (intptr_t *)os::Linux::ucontext_get_sp(uc);
+ st->print_cr("Top of Stack: (sp=" PTR_FORMAT ")", p2i(sp));
+@@ -600,7 +635,11 @@
+ // this is only for the "general purpose" registers
+ for (int i = 0; i < 32; i++) {
+ st->print("r%-2d=", i);
++#if defined(__GLIBC__) || defined(__UCLIBC__)
+ print_location(st, uc->uc_mcontext.regs->gpr[i]);
++#else // Musl
++ print_location(st, uc->uc_mcontext.gp_regs[i]);
++#endif
+ }
+ st->cr();
+ }
+--- openjdk.orig/hotspot.orig/src/cpu/ppc/vm/macroAssembler_ppc.cpp
++++ openjdk/hotspot/src/cpu/ppc/vm/macroAssembler_ppc.cpp
+@@ -1242,7 +1242,11 @@
+ // the safepoing polling page.
+ ucontext_t* uc = (ucontext_t*) ucontext;
+ // Set polling address.
++#if defined(__GLIBC__) || defined(__UCLIBC__)
+ address addr = (address)uc->uc_mcontext.regs->gpr[ra] + (ssize_t)ds;
++#else // Musl
++ address addr = (address)uc->uc_mcontext.gp_regs[ra] + (ssize_t)ds;
++#endif
+ if (polling_address_ptr != NULL) {
+ *polling_address_ptr = addr;
+ }
+@@ -1263,15 +1267,24 @@
+ int rb = inv_rb_field(instruction);
+
+ // look up content of ra and rb in ucontext
++#if defined(__GLIBC__) || defined(__UCLIBC__)
+ address ra_val=(address)uc->uc_mcontext.regs->gpr[ra];
+ long rb_val=(long)uc->uc_mcontext.regs->gpr[rb];
++#else // Musl
++ address ra_val=(address)uc->uc_mcontext.gp_regs[ra];
++ long rb_val=(long)uc->uc_mcontext.gp_regs[rb];
++#endif
+ return os::is_memory_serialize_page(thread, ra_val+rb_val);
+ } else if (is_stw(instruction) || is_stwu(instruction)) {
+ int ra = inv_ra_field(instruction);
+ int d1 = inv_d1_field(instruction);
+
+ // look up content of ra in ucontext
++#if defined(__GLIBC__) || defined(__UCLIBC__)
+ address ra_val=(address)uc->uc_mcontext.regs->gpr[ra];
++#else // Musl
++ address ra_val=(address)uc->uc_mcontext.gp_regs[ra];
++#endif
+ return os::is_memory_serialize_page(thread, ra_val+d1);
+ } else {
+ return false;
+@@ -1334,11 +1347,20 @@
+ || (is_stdu(instruction) && rs == 1)) {
+ int ds = inv_ds_field(instruction);
+ // return banged address
++#if defined(__GLIBC__) || defined(__UCLIBC__)
+ return ds+(address)uc->uc_mcontext.regs->gpr[ra];
++#else // Musl
++ return ds+(address)uc->uc_mcontext.gp_regs[ra];
++#endif
+ } else if (is_stdux(instruction) && rs == 1) {
+ int rb = inv_rb_field(instruction);
++#if defined(__GLIBC__) || defined(__UCLIBC__)
+ address sp = (address)uc->uc_mcontext.regs->gpr[1];
+ long rb_val = (long)uc->uc_mcontext.regs->gpr[rb];
++#else // Musl
++ address sp = (address)uc->uc_mcontext.gp_regs[1];
++ long rb_val = (long)uc->uc_mcontext.gp_regs[rb];
++#endif
+ return ra != 1 || rb_val >= 0 ? NULL // not a stack bang
+ : sp + rb_val; // banged address
+ }