diff options
author | A. Wilcox <awilcox@wilcox-tech.com> | 2018-11-15 01:52:22 +0000 |
---|---|---|
committer | A. Wilcox <awilcox@wilcox-tech.com> | 2018-11-15 01:52:22 +0000 |
commit | 097e4722ba191ed4ab4e51766c6fe9a23a3e0ecf (patch) | |
tree | daa93c64489cab0512bad7c4e5f4b3b848bf7859 /user/rust/0008-Fix-powerpc64-ELFv2-big-endian-struct-passing-ABI.patch | |
parent | 950827890cca5caf633480047da6115f43b1a529 (diff) | |
parent | 18b490b7953735328501c6f7e54522a91220caf3 (diff) | |
download | packages-097e4722ba191ed4ab4e51766c6fe9a23a3e0ecf.tar.gz packages-097e4722ba191ed4ab4e51766c6fe9a23a3e0ecf.tar.bz2 packages-097e4722ba191ed4ab4e51766c6fe9a23a3e0ecf.tar.xz packages-097e4722ba191ed4ab4e51766c6fe9a23a3e0ecf.zip |
Merge branch 'rust' into 'master'
user/rust: Bump to 1.30.1
See merge request !105
Diffstat (limited to 'user/rust/0008-Fix-powerpc64-ELFv2-big-endian-struct-passing-ABI.patch')
-rw-r--r-- | user/rust/0008-Fix-powerpc64-ELFv2-big-endian-struct-passing-ABI.patch | 79 |
1 files changed, 79 insertions, 0 deletions
diff --git a/user/rust/0008-Fix-powerpc64-ELFv2-big-endian-struct-passing-ABI.patch b/user/rust/0008-Fix-powerpc64-ELFv2-big-endian-struct-passing-ABI.patch new file mode 100644 index 000000000..e21cae762 --- /dev/null +++ b/user/rust/0008-Fix-powerpc64-ELFv2-big-endian-struct-passing-ABI.patch @@ -0,0 +1,79 @@ +From 5dbfa6690a13f6959e81082e45c5bf8218239069 Mon Sep 17 00:00:00 2001 +From: Samuel Holland <samuel@sholland.org> +Date: Sun, 16 Sep 2018 16:34:15 +0000 +Subject: [PATCH 08/24] Fix powerpc64 ELFv2 big-endian struct-passing ABI + +The requirements here are not "ELFv1" requirements, but big-endian +requirements, as the extension or non-extension of the argument is +necessary to put the argument in the correct half of the register. +Parameter passing in the ELFv2 ABI needs these same transformations. +Since this code makes no difference on little-endian machines, simplify +it to use the same code path everywhere. +--- + src/librustc_target/abi/call/powerpc64.rs | 29 ++++++++++------------- + src/librustc_target/abi/mod.rs | 2 +- + 2 files changed, 13 insertions(+), 18 deletions(-) + +diff --git a/src/librustc_target/abi/call/powerpc64.rs b/src/librustc_target/abi/call/powerpc64.rs +index 0c5ec77a39..934d2b1138 100644 +--- a/src/librustc_target/abi/call/powerpc64.rs ++++ b/src/librustc_target/abi/call/powerpc64.rs +@@ -75,7 +75,9 @@ fn classify_ret_ty<'a, Ty, C>(cx: C, ret: &mut ArgType<'a, Ty>, abi: ABI) + let size = ret.layout.size; + let bits = size.bits(); + if bits <= 128 { +- let unit = if bits <= 8 { ++ let unit = if cx.data_layout().endian == Endian::Big { ++ Reg { kind: RegKind::Integer, size } ++ } else if bits <= 8 { + Reg::i8() + } else if bits <= 16 { + Reg::i16() +@@ -110,22 +112,15 @@ fn classify_arg_ty<'a, Ty, C>(cx: C, arg: &mut ArgType<'a, Ty>, abi: ABI) + } + + let size = arg.layout.size; +- let (unit, total) = match abi { +- ELFv1 => { +- // In ELFv1, aggregates smaller than a doubleword should appear in +- // the least-significant bits of the parameter doubleword. The rest +- // should be padded at their tail to fill out multiple doublewords. +- if size.bits() <= 64 { +- (Reg { kind: RegKind::Integer, size }, size) +- } else { +- let align = Align::from_bits(64, 64).unwrap(); +- (Reg::i64(), size.abi_align(align)) +- } +- }, +- ELFv2 => { +- // In ELFv2, we can just cast directly. +- (Reg::i64(), size) +- }, ++ let (unit, total) = if size.bits() <= 64 { ++ // Aggregates smaller than a doubleword should appear in ++ // the least-significant bits of the parameter doubleword. ++ (Reg { kind: RegKind::Integer, size }, size) ++ } else { ++ // Aggregates larger than a doubleword should be padded ++ // at the tail to fill out a whole number of doublewords. ++ let align = Align::from_bits(64, 64).unwrap(); ++ (Reg::i64(), size.abi_align(align)) + }; + + arg.cast_to(Uniform { +diff --git a/src/librustc_target/abi/mod.rs b/src/librustc_target/abi/mod.rs +index 5c4cd849f8..bdbc592b6b 100644 +--- a/src/librustc_target/abi/mod.rs ++++ b/src/librustc_target/abi/mod.rs +@@ -214,7 +214,7 @@ impl<'a> HasDataLayout for &'a TargetDataLayout { + } + + /// Endianness of the target, which must match cfg(target-endian). +-#[derive(Copy, Clone)] ++#[derive(Copy, Clone, PartialEq)] + pub enum Endian { + Little, + Big +-- +2.18.0 + |