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| author | Massimiliano Culpo <massimiliano.culpo@gmail.com> | 2019-10-02 08:35:32 +0200 |
|---|---|---|
| committer | Todd Gamblin <tgamblin@llnl.gov> | 2019-10-10 16:24:36 -0700 |
| commit | b07460ab5f01bae693cfc73d3128c29ee9fb2c47 (patch) | |
| tree | ccab9ca52d377811827616862611ec6bc128f928 /.flake8_packages | |
| parent | 77444dff106524b0b33f664e5fe1f4512ec511d7 (diff) | |
| download | spack-b07460ab5f01bae693cfc73d3128c29ee9fb2c47.tar.gz spack-b07460ab5f01bae693cfc73d3128c29ee9fb2c47.tar.bz2 spack-b07460ab5f01bae693cfc73d3128c29ee9fb2c47.tar.xz spack-b07460ab5f01bae693cfc73d3128c29ee9fb2c47.zip | |
Added NEON to the list of features required for the aarch64 family
Both floating-point and NEON are required in all standard ARMv8
implementations. Theoretically though specialized markets can support
no NEON or floating-point at all. Source:
https://developer.arm.com/docs/den0024/latest/aarch64-floating-point-and-neon
On the other hand the base procedure call standard for Aarch64
"assumes the availability of the vector registers for passing
floating-point and SIMD arguments". Further "the Arm 64-bit
architecture defines two mandatory register banks: a general-purpose
register bank which can be used for scalar integer processing and
pointer arithmetic; and a SIMD and Floating-Point register bank".
Source:
https://developer.arm.com/docs/ihi0055/latest/procedure-call-standard-for-the-arm-64-bit-architecture
This makes customization of Aarch64 with no NEON instruction set
available so unlikely that we can consider them a feature of the
generic family.
Diffstat (limited to '.flake8_packages')
0 files changed, 0 insertions, 0 deletions