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| author | Massimiliano Culpo <massimiliano.culpo@gmail.com> | 2019-11-21 21:09:48 +0100 |
|---|---|---|
| committer | Greg Becker <becker33@llnl.gov> | 2019-11-21 13:09:48 -0700 |
| commit | 0684a58d164c46cab03b5cc31ad1b4bdbd19b1c4 (patch) | |
| tree | 3a5ca2ed766fdd62691d9d0cf88247db7dacc339 | |
| parent | 73038a3f51f3699cdd5f09aa89a047b4a028a3e8 (diff) | |
| download | spack-0684a58d164c46cab03b5cc31ad1b4bdbd19b1c4.tar.gz spack-0684a58d164c46cab03b5cc31ad1b4bdbd19b1c4.tar.bz2 spack-0684a58d164c46cab03b5cc31ad1b4bdbd19b1c4.tar.xz spack-0684a58d164c46cab03b5cc31ad1b4bdbd19b1c4.zip | |
Fixed detection for cascadelake microarchitecture (#13820)
fixes #13803
| -rw-r--r-- | lib/spack/llnl/util/cpu/microarchitectures.json | 2 | ||||
| -rw-r--r-- | lib/spack/spack/test/data/targets/linux-centos7-cascadelake | 20 | ||||
| -rw-r--r-- | lib/spack/spack/test/llnl/util/cpu.py | 2 |
3 files changed, 23 insertions, 1 deletions
diff --git a/lib/spack/llnl/util/cpu/microarchitectures.json b/lib/spack/llnl/util/cpu/microarchitectures.json index 87afc8f27d..3b58899466 100644 --- a/lib/spack/llnl/util/cpu/microarchitectures.json +++ b/lib/spack/llnl/util/cpu/microarchitectures.json @@ -609,7 +609,7 @@ "avx512bw", "avx512dq", "avx512cd", - "avx512vnni" + "avx512_vnni" ], "compilers": { "gcc": { diff --git a/lib/spack/spack/test/data/targets/linux-centos7-cascadelake b/lib/spack/spack/test/data/targets/linux-centos7-cascadelake new file mode 100644 index 0000000000..e409c3d07a --- /dev/null +++ b/lib/spack/spack/test/data/targets/linux-centos7-cascadelake @@ -0,0 +1,20 @@ +processor : 0 +vendor_id : GenuineIntel +cpu family : 6 +model : 85 +model name : Intel(R) Xeon(R) Platinum 8260M CPU @ 2.40GHz +stepping : 7 +microcode : 0x5000024 +cpu MHz : 2400.000 +cache size : 36608 KB +physical id : 0 +siblings : 48 +core id : 0 +cpu cores : 24 +apicid : 0 +initial apicid : 0 +fpu : yes +fpu_exception : yes +cpuid level : 22 +wp : yes +flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch epb cat_l3 cdp_l3 intel_ppin intel_pt ssbd mba ibrs ibpb stibp ibrs_enhanced tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm mpx rdt_a avx512f avx512dq rdseed adx smap clflushopt clwb avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local dtherm ida arat pln pts hwp hwp_act_window hwp_epp hwp_pkg_req pku ospke avx512_vnni md_clear spec_ctrl intel_stibp flush_l1d arch_capabilities
\ No newline at end of file diff --git a/lib/spack/spack/test/llnl/util/cpu.py b/lib/spack/spack/test/llnl/util/cpu.py index 87681aadfa..bfa4e42b6a 100644 --- a/lib/spack/spack/test/llnl/util/cpu.py +++ b/lib/spack/spack/test/llnl/util/cpu.py @@ -33,6 +33,7 @@ from llnl.util.cpu import Microarchitecture # noqa 'linux-rhel6-piledriver', 'linux-centos7-power8le', 'linux-centos7-thunderx2', + 'linux-centos7-cascadelake', 'darwin-mojave-ivybridge', 'darwin-mojave-haswell', 'darwin-mojave-skylake', @@ -87,6 +88,7 @@ def supported_target(request): return request.param +@pytest.mark.regression('13803') def test_target_detection(expected_target): detected_target = llnl.util.cpu.host() assert detected_target == expected_target |