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authoreugeneswalker <38933153+eugeneswalker@users.noreply.github.com>2020-11-06 19:11:13 -0800
committerGitHub <noreply@github.com>2020-11-06 21:11:13 -0600
commitfbc7cefcf76b05e3af4c0b01a403449b1675433f (patch)
treef28ec4fb0d36f95ec8cd481dd7e3df18b7a91ab3 /var
parent381305da0fc87319ea6edfad3a0780353484ef1a (diff)
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make TIMER compatible with LLVM F18 (#19765)
Diffstat (limited to 'var')
-rw-r--r--var/spack/repos/builtin/packages/openblas/package.py4
1 files changed, 4 insertions, 0 deletions
diff --git a/var/spack/repos/builtin/packages/openblas/package.py b/var/spack/repos/builtin/packages/openblas/package.py
index b663a3bb48..daa52348bc 100644
--- a/var/spack/repos/builtin/packages/openblas/package.py
+++ b/var/spack/repos/builtin/packages/openblas/package.py
@@ -260,6 +260,10 @@ class Openblas(MakefilePackage):
if '+consistent_fpcsr' in self.spec:
make_defs += ['CONSISTENT_FPCSR=1']
+ # Flang/f18 does not provide ETIME as an intrinsic
+ if self.spec.satisfies('%clang'):
+ make_defs.append('TIMER=INT_CPU_TIME')
+
# Prevent errors in `as` assembler from newer instructions
if self.spec.satisfies('%gcc@:4.8.4'):
make_defs.append('NO_AVX2=1')