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| author | Howard Pritchard <howardp@lanl.gov> | 2021-05-11 12:16:09 -0600 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2021-05-11 18:16:09 +0000 |
| commit | f055a484458e4efa70e12e67640096b2609e126b (patch) | |
| tree | ff987b25d3a299f34cc3422a2c681634ecb59d47 /var | |
| parent | 0368f8ae51763a10ee9522a73b7b6187e797affc (diff) | |
| download | spack-f055a484458e4efa70e12e67640096b2609e126b.tar.gz spack-f055a484458e4efa70e12e67640096b2609e126b.tar.bz2 spack-f055a484458e4efa70e12e67640096b2609e126b.tar.xz spack-f055a484458e4efa70e12e67640096b2609e126b.zip | |
cray: fix parsing of module list (#23566)
The code for guessing cpu archtype based on craype modules names got confused,
at least on LLNL RZ prototype systems. In particular a (L) or (D) at the end of a craype-x86-xxx or other
cpu architecture module was geting the logic confused.
With this patch, any white space + remaining characters in the moduel name are removed.
Signed-off-by: Howard Pritchard <howardp@lanl.gov>
Diffstat (limited to 'var')
0 files changed, 0 insertions, 0 deletions