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author | Rich Felker <dalias@aerifal.cx> | 2014-08-25 15:43:40 -0400 |
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committer | Rich Felker <dalias@aerifal.cx> | 2014-08-25 15:43:40 -0400 |
commit | ea818ea8340c13742a4f41e6077f732291aea4bc (patch) | |
tree | f2a97e8f8a25fc3337002aa30bb235575593af86 | |
parent | 5345c9b884e7c4e73eb2c8bb83b8d0df20f95afb (diff) | |
download | musl-ea818ea8340c13742a4f41e6077f732291aea4bc.tar.gz musl-ea818ea8340c13742a4f41e6077f732291aea4bc.tar.bz2 musl-ea818ea8340c13742a4f41e6077f732291aea4bc.tar.xz musl-ea818ea8340c13742a4f41e6077f732291aea4bc.zip |
add working a_spin() atomic for non-x86 targets
conceptually, a_spin needs to be at least a compiler barrier, so the
compiler will not optimize out loops (and the load on each iteration)
while spinning. it should also be a memory barrier, or the spinning
thread might keep spinning without noticing stores from other threads,
thus delaying for longer than it should.
ideally, an optimal a_spin implementation that avoids unnecessary
cache/memory contention should be chosen for each arch, but for now,
the easiest thing is to perform a useless a_cas on the calling
thread's stack.
-rw-r--r-- | arch/arm/atomic.h | 1 | ||||
-rw-r--r-- | arch/microblaze/atomic.h | 1 | ||||
-rw-r--r-- | arch/mips/atomic.h | 1 | ||||
-rw-r--r-- | arch/or1k/atomic.h | 1 | ||||
-rw-r--r-- | arch/powerpc/atomic.h | 1 | ||||
-rw-r--r-- | arch/sh/atomic.h | 1 |
6 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/atomic.h b/arch/arm/atomic.h index 302e6d8f..52103542 100644 --- a/arch/arm/atomic.h +++ b/arch/arm/atomic.h @@ -103,6 +103,7 @@ static inline void a_store(volatile int *p, int x) static inline void a_spin() { + __k_cas(&(int){0}, 0, 0)); } static inline void a_crash() diff --git a/arch/microblaze/atomic.h b/arch/microblaze/atomic.h index 96265fe6..abb79b53 100644 --- a/arch/microblaze/atomic.h +++ b/arch/microblaze/atomic.h @@ -97,6 +97,7 @@ static inline void a_store(volatile int *p, int x) static inline void a_spin() { + a_cas(&(int){0}, 0, 0); } static inline void a_crash() diff --git a/arch/mips/atomic.h b/arch/mips/atomic.h index 3ec03586..cc5bf498 100644 --- a/arch/mips/atomic.h +++ b/arch/mips/atomic.h @@ -137,6 +137,7 @@ static inline void a_store(volatile int *p, int x) static inline void a_spin() { + a_cas(&(int){0}, 0, 0); } static inline void a_crash() diff --git a/arch/or1k/atomic.h b/arch/or1k/atomic.h index 5b0411b0..f9e69815 100644 --- a/arch/or1k/atomic.h +++ b/arch/or1k/atomic.h @@ -74,6 +74,7 @@ static inline void a_store(volatile int *p, int x) static inline void a_spin() { + a_cas(&(int){0}, 0, 0); } static inline void a_crash() diff --git a/arch/powerpc/atomic.h b/arch/powerpc/atomic.h index 1044886d..1c50361e 100644 --- a/arch/powerpc/atomic.h +++ b/arch/powerpc/atomic.h @@ -80,6 +80,7 @@ static inline void a_store(volatile int *p, int x) static inline void a_spin() { + a_cas(&(int){0}, 0, 0); } static inline void a_crash() diff --git a/arch/sh/atomic.h b/arch/sh/atomic.h index 93ab54fe..b95bbffc 100644 --- a/arch/sh/atomic.h +++ b/arch/sh/atomic.h @@ -53,6 +53,7 @@ static inline void a_dec(volatile int *x) static inline void a_spin() { + a_cas(&(int){0}, 0, 0); } static inline void a_crash() |