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author | Rich Felker <dalias@aerifal.cx> | 2018-10-01 18:37:02 -0400 |
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committer | Rich Felker <dalias@aerifal.cx> | 2018-10-01 18:37:02 -0400 |
commit | 0beb9dfbecad38af9759b1e83eeb007e28b70abb (patch) | |
tree | 75c42c8b544a480ba0a7664ebe83d88de654cd60 /arch/mipsn32/bits | |
parent | 4d0a82170a25464c39522d7190b9fe302045ddb2 (diff) | |
download | musl-0beb9dfbecad38af9759b1e83eeb007e28b70abb.tar.gz musl-0beb9dfbecad38af9759b1e83eeb007e28b70abb.tar.bz2 musl-0beb9dfbecad38af9759b1e83eeb007e28b70abb.tar.xz musl-0beb9dfbecad38af9759b1e83eeb007e28b70abb.zip |
add TLSDESC support for 32-bit arm
unlike other asm where the baseline ISA is used, these functions are
hot paths and use ISA-level specializations.
call-clobbered vfp registers are saved before calling __tls_get_new,
since there is no guarantee it won't use them. while setjmp/longjmp
have to use hwcap to decide whether to the fpu is in use, since
application code could be using vfp registers even if libc was
compiled as pure softfloat, __tls_get_new is part of libc and can be
assumed not to have access to vfp registers if tlsdesc.S does not.
thus it suffices just to check the predefined preprocessor macros. the
check for __ARM_PCS_VFP is redundant; !__SOFTFP__ must always be true
if the target ISA level includes fpu instructions/registers.
Diffstat (limited to 'arch/mipsn32/bits')
0 files changed, 0 insertions, 0 deletions