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authorRich Felker <dalias@aerifal.cx>2014-07-19 15:57:48 -0400
committerRich Felker <dalias@aerifal.cx>2014-07-19 15:57:48 -0400
commit1456b7ae6b72a4f2c446243acdde7c951268d4ab (patch)
tree02526795c601affa9d0b878ae536dfb5f1aafa33 /arch/powerpc
parentbcad48439494820989f5867c3f8ccfa6aae2909f (diff)
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fix missing barrier instructions in powerpc atomic asm
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/atomic.h5
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/powerpc/atomic.h b/arch/powerpc/atomic.h
index a1049bdb..c4ad40cd 100644
--- a/arch/powerpc/atomic.h
+++ b/arch/powerpc/atomic.h
@@ -25,11 +25,14 @@ static inline int a_ctz_64(uint64_t x)
static inline int a_cas(volatile int *p, int t, int s)
{
- __asm__("1: lwarx %0, 0, %4\n"
+ __asm__("\n"
+ " sync\n"
+ "1: lwarx %0, 0, %4\n"
" cmpw %0, %2\n"
" bne 1f\n"
" stwcx. %3, 0, %4\n"
" bne- 1b\n"
+ " isync\n"
"1: \n"
: "=&r"(t), "+m"(*p) : "r"(t), "r"(s), "r"(p) : "cc", "memory" );
return t;