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author | Andre McCurdy <armccurdy@gmail.com> | 2019-09-13 11:44:31 -0700 |
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committer | Rich Felker <dalias@aerifal.cx> | 2020-01-16 15:44:26 -0500 |
commit | 91e662d1d941215eb024787db5e910dbfb5b169f (patch) | |
tree | d3b2506ee656488fd55cdae9923373c2e354a8dd /src/string/arm/memcpy_le.S | |
parent | 0ff18be20833928064f6eff88e590cea9625f602 (diff) | |
download | musl-91e662d1d941215eb024787db5e910dbfb5b169f.tar.gz musl-91e662d1d941215eb024787db5e910dbfb5b169f.tar.bz2 musl-91e662d1d941215eb024787db5e910dbfb5b169f.tar.xz musl-91e662d1d941215eb024787db5e910dbfb5b169f.zip |
add thumb2 support to arm assembler memcpy
For Thumb2 compatibility, replace two instances of a single
instruction "orr with a variable shift" with the two instruction
equivalent. Neither of the replacements are in a performance critical
loop.
Diffstat (limited to 'src/string/arm/memcpy_le.S')
-rw-r--r-- | src/string/arm/memcpy_le.S | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/src/string/arm/memcpy_le.S b/src/string/arm/memcpy_le.S index 9cfbcb2a..7b35d305 100644 --- a/src/string/arm/memcpy_le.S +++ b/src/string/arm/memcpy_le.S @@ -1,4 +1,4 @@ -#if !__ARMEB__ && !__thumb__ +#if !__ARMEB__ /* * Copyright (C) 2008 The Android Open Source Project @@ -40,8 +40,9 @@ * This file has been modified from the original for use in musl libc. * The main changes are: addition of .type memcpy,%function to make the * code safely callable from thumb mode, adjusting the return - * instructions to be compatible with pre-thumb ARM cpus, and removal - * of prefetch code that is not compatible with older cpus. + * instructions to be compatible with pre-thumb ARM cpus, removal of + * prefetch code that is not compatible with older cpus and support for + * building as thumb 2. */ .syntax unified @@ -241,7 +242,8 @@ non_congruent: beq 2f ldr r5, [r1], #4 sub r2, r2, #4 - orr r4, r3, r5, lsl lr + mov r4, r5, lsl lr + orr r4, r4, r3 mov r3, r5, lsr r12 str r4, [r0], #4 cmp r2, #4 @@ -348,7 +350,8 @@ less_than_thirtytwo: 1: ldr r5, [r1], #4 sub r2, r2, #4 - orr r4, r3, r5, lsl lr + mov r4, r5, lsl lr + orr r4, r4, r3 mov r3, r5, lsr r12 str r4, [r0], #4 cmp r2, #4 |