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author | Rich Felker <dalias@aerifal.cx> | 2015-04-24 22:08:49 -0400 |
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committer | Rich Felker <dalias@aerifal.cx> | 2015-04-24 22:08:49 -0400 |
commit | 94f4c8237a58eba21ae24e19ea2d5b7321c0c1f6 (patch) | |
tree | 93ab4bfaf3fae630e9ee8cc9a3b82a1424c13628 /src | |
parent | 1fb0878ebc037ee2ad9e31e5873b6c7f95b22c1c (diff) | |
download | musl-94f4c8237a58eba21ae24e19ea2d5b7321c0c1f6.tar.gz musl-94f4c8237a58eba21ae24e19ea2d5b7321c0c1f6.tar.bz2 musl-94f4c8237a58eba21ae24e19ea2d5b7321c0c1f6.tar.xz musl-94f4c8237a58eba21ae24e19ea2d5b7321c0c1f6.zip |
fix build regression in aarch64 sigsetjmp
at least some assembler versions do not accept the register name lr.
use the name x30 instead.
Diffstat (limited to 'src')
-rw-r--r-- | src/signal/aarch64/sigsetjmp.s | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/signal/aarch64/sigsetjmp.s b/src/signal/aarch64/sigsetjmp.s index 347d0bc0..75910c43 100644 --- a/src/signal/aarch64/sigsetjmp.s +++ b/src/signal/aarch64/sigsetjmp.s @@ -6,7 +6,7 @@ sigsetjmp: __sigsetjmp: cbz x1,setjmp - str lr,[x0,#176] + str x30,[x0,#176] str x19,[x0,#176+8+8] mov x19,x0 @@ -14,7 +14,7 @@ __sigsetjmp: mov w1,w0 mov x0,x19 - ldr lr,[x0,#176] + ldr x30,[x0,#176] ldr x19,[x0,#176+8+8] .hidden __sigsetjmp_tail |