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AgeCommit message (Expand)AuthorFilesLines
2019-10-02reintroduce riscv64 struct sigcontextRich Felker1-6/+10
2019-09-29fix riscv64 elf_fpregset_t type and member names mismatchRich Felker1-5/+2
2019-09-29fix riscv64 signal.h namespace violations and ucontext API mismatchesRich Felker2-27/+20
2019-09-25correct the operand specifiers in the riscv64 CAS routinesPalmer Dabbelt1-2/+2
2019-09-11add new syscall numbers from linux v5.2Szabolcs Nagy1-0/+7
2019-08-13re-add ELF gregs and fpregs types to riscv64 user.hKhem Raj1-0/+8
2019-08-06remove riscv64 bits/user.h contentsRich Felker1-43/+0
2019-08-06fix risc64 conflict with kernel headersBaruch Siach1-8/+8
2019-08-03update riscv64 syscall numbers to linux v5.1Rich Felker1-0/+8
2019-07-30remove gratuitously-different arch-specific bits/ipc.h filesRich Felker1-12/+0
2019-07-30move IPC_64 from public bits/ipc.h to syscall_arch.hRich Felker2-2/+2
2019-07-29remove duplicates of new generic bits/msg.hRich Felker1-13/+0
2019-07-29remove duplicates of new generic bits/sem.hRich Felker1-9/+0
2019-07-29extricate bits/sem.h from x32 time_t hackRich Felker1-3/+3
2019-07-29remove duplicates of new generic bits/shm.hRich Felker1-25/+0
2019-07-18decouple struct stat from kernel typeRich Felker1-0/+21
2019-07-17use register constraint instead of memory operand for riscv64 atomicsRich Felker1-8/+8
2019-07-17fix riscv64 atomic asm constraintsRich Felker1-6/+10
2019-07-17fix riscv64 syscall asm constraintRich Felker1-1/+1
2019-07-04remove spurious MAP_32BIT definition from riscv64 archRich Felker1-1/+0
2019-06-14add riscv64 architecture supportRich Felker25-0/+835
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