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authorMassimiliano Culpo <massimiliano.culpo@gmail.com>2019-10-02 08:35:32 +0200
committerTodd Gamblin <tgamblin@llnl.gov>2019-10-10 16:24:36 -0700
commitb07460ab5f01bae693cfc73d3128c29ee9fb2c47 (patch)
treeccab9ca52d377811827616862611ec6bc128f928
parent77444dff106524b0b33f664e5fe1f4512ec511d7 (diff)
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Added NEON to the list of features required for the aarch64 family
Both floating-point and NEON are required in all standard ARMv8 implementations. Theoretically though specialized markets can support no NEON or floating-point at all. Source: https://developer.arm.com/docs/den0024/latest/aarch64-floating-point-and-neon On the other hand the base procedure call standard for Aarch64 "assumes the availability of the vector registers for passing floating-point and SIMD arguments". Further "the Arm 64-bit architecture defines two mandatory register banks: a general-purpose register bank which can be used for scalar integer processing and pointer arithmetic; and a SIMD and Floating-Point register bank". Source: https://developer.arm.com/docs/ihi0055/latest/procedure-call-standard-for-the-arm-64-bit-architecture This makes customization of Aarch64 with no NEON instruction set available so unlikely that we can consider them a feature of the generic family.
-rw-r--r--lib/spack/llnl/util/cpu/microarchitectures.json6
-rw-r--r--lib/spack/spack/test/llnl/util/cpu.py1
2 files changed, 7 insertions, 0 deletions
diff --git a/lib/spack/llnl/util/cpu/microarchitectures.json b/lib/spack/llnl/util/cpu/microarchitectures.json
index ad985ba994..5a288c5809 100644
--- a/lib/spack/llnl/util/cpu/microarchitectures.json
+++ b/lib/spack/llnl/util/cpu/microarchitectures.json
@@ -904,6 +904,12 @@
"any_of": [
"sse4_2"
]
+ },
+ "neon": {
+ "reason": "NEON is required in all standard ARMv8 implementations",
+ "families": [
+ "aarch64"
+ ]
}
}
}
diff --git a/lib/spack/spack/test/llnl/util/cpu.py b/lib/spack/spack/test/llnl/util/cpu.py
index 9af784d103..9c65825a52 100644
--- a/lib/spack/spack/test/llnl/util/cpu.py
+++ b/lib/spack/spack/test/llnl/util/cpu.py
@@ -156,6 +156,7 @@ def test_architecture_family(target_name, expected_family):
('skylake', 'sse3'),
('power8', 'altivec'),
('broadwell', 'sse4.1'),
+ ('aarch64', 'neon')
])
def test_features_query(target_name, feature):
target = llnl.util.cpu.targets[target_name]