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| author | Matt Belhorn <belhornmp@ornl.gov> | 2020-02-06 09:42:05 -0600 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-02-06 16:42:05 +0100 |
| commit | b43f658c397f2cb1ebd7ed3bca1c9fb1d90a04b4 (patch) | |
| tree | 5ec5ee85ba05263815afb1658c65f2dd13ca3b91 /lib | |
| parent | 6b1958219867f6fd140557caf753280e6d97a3a5 (diff) | |
| download | spack-b43f658c397f2cb1ebd7ed3bca1c9fb1d90a04b4.tar.gz spack-b43f658c397f2cb1ebd7ed3bca1c9fb1d90a04b4.tar.bz2 spack-b43f658c397f2cb1ebd7ed3bca1c9fb1d90a04b4.tar.xz spack-b43f658c397f2cb1ebd7ed3bca1c9fb1d90a04b4.zip | |
Adds fma and vsx features to entire power arch family. (#14759)
VSX alitvec extensions are supported by PowerISA from v2.06 (Power7+), but might
not be listed in features.
FMA has been supported by PowerISA since Power1, but might not be listed in
features.
This commit adds these features to all the power ISA family sets.
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/spack/llnl/util/cpu/microarchitectures.json | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/lib/spack/llnl/util/cpu/microarchitectures.json b/lib/spack/llnl/util/cpu/microarchitectures.json index 56f1f19df8..51411d4a24 100644 --- a/lib/spack/llnl/util/cpu/microarchitectures.json +++ b/lib/spack/llnl/util/cpu/microarchitectures.json @@ -1298,6 +1298,20 @@ "ppc64" ] }, + "vsx": { + "reason": "VSX alitvec extensions are supported by PowerISA from v2.06 (Power7+), but might not be listed in features", + "families": [ + "ppc64le", + "ppc64" + ] + }, + "fma": { + "reason": "FMA has been supported by PowerISA since Power1, but might not be listed in features", + "families": [ + "ppc64le", + "ppc64" + ] + }, "sse4.1": { "reason": "permits to refer to sse4_1 also as sse4.1", "any_of": [ |